Invited Speakers

The Conference programme will feature fsix plenary invited presentations jointly with ESSCIRC, three ESSDERC and ESSCIRC plenary presentations, and three ESSDERC and ESSCIRC session invited presentations.

Plenary Invited Presentations

H. De Man, IMEC, Belgium, "Nanoscale System Design Challenges: business as usual?".
A. Sangiovanni Vincentelli, , U.C. Berkeley, USA, and PARADES-GEIE, Italy, "The art and science of integrated system design".
Y. Wada, Hitachi, Japan, "Prospects for Single Molecule Information Devices".
N. Manaresi, Silicon Biosystems, Italy, "Microelectronics meets Biology: challenges and opportunities for functional integration in lab-on-a-chip".
R. Van de Plassche, Broadcom, The Nederlands, "High-speed converters for telecom applications".
A. Chandrakasan, MIT, USA, "Power aware wireless microsensor systems ".

ESSDERC Plenary Invited Presentations

D. Harame, IBM, USA, "Imagine the Future in Telecommunications Technology".
S. Coffa, ST-Microelectronics, Italy, "Materials, Devices and Circuit Applications of Si-based Optoelectronics".
Y. Takahashi, NTT Corporation, Japan, "Silicon Single-electron devices for logic applications".

ESSCIRC Plenary Invited Presentations

R. Yung, Intel, USA, "Future Trend of Microrocessor Design".
P. Balthus, Philips, The Nederlands, "Efficient Design Method for RF transceiver at 5 GHz and beyond".
M. Mancuso, STMicroelectronics, Italy, "Ultra Low-Power Multimedia Processor for Mobile Multimedia Applications".

ESSDERC Session Invited Presentations

C. Contiero, ST-Microelectronics, Italy, "Roadmap Differentiation and Emerging Trends in BCD Technology".
H. Tuinhout, Philips, The Nederlands, "Impact of Parametric Fluctuations on Performance and Yield of Deep-Submicron Technologies".
A. Bertoni, INFM, Italy, "Quantum Computation and Proposal for Solid-state quantum Gates".

ESSCIRC Session Invited Presentations

J. Sevenhans, Alcatel, Belgium, "Driving the DSL Highway, with Compact Hardware and Analog Power Efficiency for Full-Density Low-Cost Silicon Integration".
R. K. Krishnamurthy, Intel, USA, "High-Performance, Low-Power, and Leakage-Tolerance Challenges for Sub-70nm Microprocessor Circuits".
G. Cherubini, IBM, Switzerland, "The Millipede, a Very Dense, Highly Parallel Scanning Probe Data Storage System".

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